دانلود مقاله ISI آدرس‌دهی مؤلفه DC در الگوریتم های PLL و فیلتر وفقی

عنوان انگلیسی مقاله:
 Addressing DC Component in PLL and Notch Filter Algorithms

ترجمه فارسی عنوان مقاله:
 آدرس‌دهی مؤلفه DC در الگوریتم‌های PLL و فیلتر وفقی

چکیده انگلیسی مقاله:
This paper presents a method for addressing the dc component in the input signal of the phase-locked loop (PLL) and notch ?lter algorithms applied to ?ltering and synchronization applications. The dc component may be intrinsically present in the input signal or may be generated due to temporary system faults or due to the structure and limitations of the measurement/conversion processes. Such a component creates low-frequency oscillations in the loop that cannot be removed using ?lters because such ?lters will signi?cantly degrade the dynamic response of the system. The proposed method is based on adding a new loop inside the PLL structure. It is structurally simple and, unlike an existing method discussed in this paper, does not compromise the high-frequency ?ltering level of the concerned algorithm. The method is formulated for three-phase and single-phase systems, its design aspects are discussed, and simulations/experimental results are presented.Index Terms—Adaptive notch ?lter (ANF), dc component, dc ffset, enhanced phase-locked loop (EPLL), notch ?lter (NF), orthogonal signal generator (OSG), phase-locked loop (PLL), secondorder generalized integrator frequency-locked loop (SOGI-FLL), synchronous reference-frame phase-locked loop (SRF-PLL).

منتشر کننده مقاله: IEEE

سال انتشار مقاله: 2012
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قیمت: فقط 3,000 تومان
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سایز: KB 944
فرمت: pdf
تعداد صفحات/اسلاید: 9